Publications
Peer Reviewed Journals
[J3] PROWAVES: Proactive Runtime Wavelength Selection for Energy-efficient Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse Coskun
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020
[J2] Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5D Systems
Ayse Coskun, Furkan Eris, Ajay Joshi, Andrew B Kahng, Yenai Ma, Aditya Narayan, Vaishnav Srinivas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020
[J1] Development of the ABCStar front-end chip for the ATLAS Silicon Strip Upgrade
Weiguo Lu, Francis Anghinolfi, Libo Cheng, Joel Nathan Dewitt, Jan Kaplon, Paul Keener, Aditya Narayan, Mitchell Newcomer and Krzysztof Swientek
Journal of Instrumentation, vol. 12, no. 04, p. C04017, 2017
Conference Publications
[C6] Bandwidth Allocation in Silicon-Photonics Networks Using Application Instrumentation
Aditya Narayan, Ajay Joshi and Ayse Kivilcim Coskun
Proceedings of High Performance Extreme Computing (HPEC), Sept 2020
[C5] System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi and Ayse Kivilcim Coskun
Proceedings of Design, Automation and Test in Europe (DATE), March 2020
[C4] POPSTAR: A Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems
Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse Coskun, Denis Dutoit, Pascal Vivet
Proceedings of Design, Automation and Test in Europe (DATE), March 2020
[C3] WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero and Ayse Kivilcim Coskun
Proceedings of Design, Automation and Test in Europe (DATE), March 2019
[C2] MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems
Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun
Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), May 2018
[C1] FPGA Implementation of Viterbi Algorithm & Adaptive Viterbi Algorithms for normal and turbo coded data
R Gokul Subramanian, Aditya Narayan and V.K.Chaubey
National Conference on VLSI Design & Embedded Systems (NCVDES), 2011
Workshops
[W4] Power-efficient Photonic Network-on-chips via System-level Wavelength Optimization
Aditya Narayan, Yvain Thonnart, Pascal Vivet and Ayse Kivilcim Coskun
North American Workshop on Silicon Photonics for High Performance Computing (SPHPC), May 2019
[W3] A System-Level Perspective on Silicon Photonic Network-on-Chips
Aditya Narayan and Ayse Kivilcim Coskun
International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS), March 2019
[W2] Temperature and Process Variation-Aware Wavelength Selection in Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero and Ayse Kivilcim Coskun
Boston Area Architecture Workshop (BARC), Jan 2019
[W1] An Automated Framework for Memory Allocation in Heterogeneous Memory Systems
Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun
Boston Area Architecture Workshop (BARC), Jan 2018
[J3] PROWAVES: Proactive Runtime Wavelength Selection for Energy-efficient Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ayse Coskun
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020
[J2] Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5D Systems
Ayse Coskun, Furkan Eris, Ajay Joshi, Andrew B Kahng, Yenai Ma, Aditya Narayan, Vaishnav Srinivas
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2020
[J1] Development of the ABCStar front-end chip for the ATLAS Silicon Strip Upgrade
Weiguo Lu, Francis Anghinolfi, Libo Cheng, Joel Nathan Dewitt, Jan Kaplon, Paul Keener, Aditya Narayan, Mitchell Newcomer and Krzysztof Swientek
Journal of Instrumentation, vol. 12, no. 04, p. C04017, 2017
Conference Publications
[C6] Bandwidth Allocation in Silicon-Photonics Networks Using Application Instrumentation
Aditya Narayan, Ajay Joshi and Ayse Kivilcim Coskun
Proceedings of High Performance Extreme Computing (HPEC), Sept 2020
[C5] System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi and Ayse Kivilcim Coskun
Proceedings of Design, Automation and Test in Europe (DATE), March 2020
[C4] POPSTAR: A Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems
Yvain Thonnart, Stéphane Bernabé, Jean Charbonnier, Christian Bernard, David Coriat, César Fuguet, Pierre Tissier, Benoît Charbonnier, Stéphane Malhouitre, Damien Saint-Patrice, Myriam Assous, Aditya Narayan, Ayse Coskun, Denis Dutoit, Pascal Vivet
Proceedings of Design, Automation and Test in Europe (DATE), March 2020
[C3] WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero and Ayse Kivilcim Coskun
Proceedings of Design, Automation and Test in Europe (DATE), March 2019
[C2] MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems
Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun
Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), May 2018
[C1] FPGA Implementation of Viterbi Algorithm & Adaptive Viterbi Algorithms for normal and turbo coded data
R Gokul Subramanian, Aditya Narayan and V.K.Chaubey
National Conference on VLSI Design & Embedded Systems (NCVDES), 2011
Workshops
[W4] Power-efficient Photonic Network-on-chips via System-level Wavelength Optimization
Aditya Narayan, Yvain Thonnart, Pascal Vivet and Ayse Kivilcim Coskun
North American Workshop on Silicon Photonics for High Performance Computing (SPHPC), May 2019
[W3] A System-Level Perspective on Silicon Photonic Network-on-Chips
Aditya Narayan and Ayse Kivilcim Coskun
International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS), March 2019
[W2] Temperature and Process Variation-Aware Wavelength Selection in Photonic NoCs
Aditya Narayan, Yvain Thonnart, Pascal Vivet, César Fuguet Tortolero and Ayse Kivilcim Coskun
Boston Area Architecture Workshop (BARC), Jan 2019
[W1] An Automated Framework for Memory Allocation in Heterogeneous Memory Systems
Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy and Ayse Coskun
Boston Area Architecture Workshop (BARC), Jan 2018
Posters and Other Talks
Energy-efficient Photonic Networks for 2.5D Manycore Systems (Poster)
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi and Ayse K. Coskun
Design Automation Conference (DAC), PhD Forum, 2020
Design and Management of Processing-in-Memory Systems (Poster)
Aditya Narayan, Ayse K. Coskun
Design Automation Conference (DAC), Richard Newton Young Scholars Program, 2017
Design of Fast Cluster Finder for ABCStar
Aditya Narayan, Paul Keener, Mitch Newcomer
ITK Strips ASICs Meeting, ATLAS Upgrade Week at CERN April, 2015
Aditya Narayan, Yvain Thonnart, Pascal Vivet, Ajay Joshi and Ayse K. Coskun
Design Automation Conference (DAC), PhD Forum, 2020
Design and Management of Processing-in-Memory Systems (Poster)
Aditya Narayan, Ayse K. Coskun
Design Automation Conference (DAC), Richard Newton Young Scholars Program, 2017
Design of Fast Cluster Finder for ABCStar
Aditya Narayan, Paul Keener, Mitch Newcomer
ITK Strips ASICs Meeting, ATLAS Upgrade Week at CERN April, 2015